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SPOTLIGHT PUBLICATION | 26/06/2025

The Crypto Agility Paradox: When Hardware Becomes Your Security Bottleneck

In this episode of Shielded, we are joined by Cassie Crossley, Vice President of Supply Chain Security in the Global Cybersecurity & Product Security Office at Schneider Electric. Cassie shares the hard-earned lessons from a multi-year crypto agility program in one of the world’s largest OT environments.

Your Hardware Refresh Is a Quantum Deadline with Mamta Gupta, Lattice Semiconductor

In this episode of Shielded, Johannes Lintzen sits down with Mamta Gupta of Lattice Semiconductor to explore how hardware-rooted security must evolve to meet the post-quantum challenge.

HSMs and PQC Migration: Are We There Yet? / RSA

In this special RSA 2025 edition we gather 4 leading voices from the world of hardware security to discuss a cornerstone technology powering the post-quantum migration: the Hardware Security Module (HSM).

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MIRACLE: MIcRo-ArChitectural Leakage Evaluation: A study of micro-architectural power leakage across many devices

In this paper, we describe an extensible experimental infrastructure for evaluating the micro-architectural leakage, based on power consumption, that stems from a physical device.

A Concrete Treatment of Efficient Continuous Group Key Agreement via Multi-Recipient PKEs

Continuous group key agreements (CGKAs) are a class of protocols that can provide strong security guarantees to secure group messaging protocols such as Signal and MLS.

A lightweight ISE for ChaCha on RISC-V

This paper proposes a lightweight ISE to support the cipher ChaCha on RISC-V architectures. we target embedded computing systems such as IoT edge devices that don’t support a vector engine.

XDIVINSA: eXtended DIVersifying INStruction Agent to Mitigate Power Side-Channel Leakage

Side-channel analysis (SCA) attacks pose a major threat to embedded systems due to their ease of accessibility.

An Instruction Set Extension to Support Software-Based Masking

In both hardware and software, masking can represent an effective means of hardening an implementation against side-channel attack vectors such as Differential Power Analysis (DPA).

Probing Security through Input-Output Separation and Revisited Quasilinear Masking

This paper introduces a new framework for the composition of probing-secure circuits.

SoK: How (not) to Design and Implement Post-quantum Cryptography

Post-quantum cryptography has known a Cambrian explosion in the last decade. We systematize the current state of knowledge on post-quantum cryptography.

Exact Lattice Sampling from Non-Gaussian Distributions

We propose a new framework for (trapdoor) sampling over lattices.

Exploring Parallelism to Improve the Performance of FrodoKEM in Hardware

FrodoKEM is a lattice-based key encapsulation mechanism, currently a semi-finalist in NIST’s post-quantum standardisation effort.

Quantum Computing Threat: NIST PQC standards are here… how can you keep ahead?

Cryptographic agility and a clear roadmap to the NIST standards are key to a smooth and secure transition to PQC.

Quantum Computing Threat: An Overview of Post-Quantum Cryptography

The goal of this document is to provide the reader with an understanding of the key technical ideas used in post‐quantum cryptography.

Quantum Computing Threat: The First NIST Post-Quantum Cryptographic Standards

In 2016, the National Institute of Standards and Technology (NIST) launched a open and world‐ wide effort to propose, analyze and eventually standardize post‐quantum cryptographic schemes. In this white paper we find out more.