LMS, XMSS, SLH-DSA for RISC-V CPU

Low memory footprint? No problem...

Industrial controls at risk

ICS devices (PLCs, RTUs, sensors) have operational lifespans of 10 to 30 years. A compromise of the firmware/software used in these systems can lead to malfunction, physical damage, or widespread outages, and it is possible for an attacker to harvest a vendor’s public key today with a view to decrypting it when the technology becomes available, leading to the possibility of a malicious update or interception of critical data on legacy equipment.

PQMicroLib-Core

PQMicroLib-Core can be optimized for hash-based schemes (HBS) such as LMS, XMSS and SLH-DSA (FIPS 205). These HBS schemes are quantum-resistant by nature, and can deploy digital secure digital signature verification – crucial for remote attestation or secure boot in microcontrollers, ICS devices and monitoring equipment. It’s particularly relevant and effective for RISC-V CPUs because of the architecture’s inherent flexibility, and the challenges PQC algorithms pose to resource-constrained systems – something for which a flexible library such as PQMicroLib-Core has been specifically designed.